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    Home » Siemens and NVIDIA Build Self-Verifying AI Agents for Chip and PCB Design
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    Siemens and NVIDIA Build Self-Verifying AI Agents for Chip and PCB Design

    Art RyanBy Art RyanJuly 27, 2026Updated:July 27, 2026No Comments7 Mins Read
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    Siemens self-verifying agentic AI
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    Siemens is giving AI agents a tougher job than generating reports or answering engineering questions. The company is expanding its partnership with NVIDIA to develop self-verifying agentic AI workflows for semiconductor and printed circuit board design. One of the early goals is to showcase Siemens self-verifying agentic AI in real engineering contexts. These agents will not simply perform tasks across engineering software. They will also check their own decisions against established, physics-based electronic design automation tools.

    That distinction matters. A chatbot can make a mistake and produce an awkward sentence. An AI agent working on a processor, memory chip or circuit board can create an error that appears much later, after engineers have already spent considerable time and money moving the design toward production. Siemens wants its agents to catch those problems while the work is still happening.

    Siemens Wants AI Agents That Can Check Their Own Work

    The new capabilities build on the Siemens Fuse EDA AI Agent system, which coordinates complex engineering tasks across semiconductor, 3D integrated circuit and PCB design workflows. Fuse can already plan tasks, call different engineering tools and move work between specialised AI agents. The expanded system adds a continuous verification layer.

    An agent might propose a design change, run the appropriate Siemens EDA tool, examine the result and revise its approach when the result fails to meet technical requirements. It can repeat that loop without waiting for an engineer to manually restart every stage.

    In other words, the agent does not have to assume that its first answer is correct. Siemens said the system validates decisions against deterministic, physics-based EDA engines. That gives the AI a more reliable reference point than its own generated reasoning. The company expects this approach to improve design quality, reduce completion times and make tool calls more dependable during long-running engineering projects.

    NVIDIA Supplies the Models, Runtime and Computing Layer

    NVIDIA is providing several parts of the technical stack behind the upgraded workflows. Siemens is using the NVIDIA NeMo Gym open library to optimise agents for semiconductor and PCB design environments. These agents can learn from completed projects, refine their execution strategies and make better use of accumulated engineering context.

    The NVIDIA OpenShell runtime adds security controls, governed access and audit trails. That piece is important because chip designs contain highly sensitive intellectual property. An engineering company cannot casually allow an autonomous agent to open files, run tools or move data without knowing exactly what it accessed.

    NVIDIA Nemotron models and Switchyard provide the reasoning layer, while NVIDIA accelerated computing and CUDA-X libraries support both the AI agents and the EDA applications they operate. Siemens claims the combined infrastructure could help teams reach signoff-quality results in hours rather than days. That is a company projection, and actual results will depend on the design, workflow and computing environment. Still, the focus is clear: faster engineering without treating verification as an afterthought.

    Fuse EDA AI Agent Reaches Across the Chip Design Process

    Chip development rarely happens inside one application. Engineers move between synthesis, simulation, verification, physical implementation, testing and manufacturing preparation. Each stage has its own tools, data formats and technical requirements. That fragmentation makes the field attractive for agentic AI, but it also makes failures harder to spot.

    Siemens is positioning Fuse as the coordination layer across its EDA portfolio. The system can work with Catapult for high-level synthesis, Questa One and Veloce for verification, Solido for custom IC design and Aprisa for physical implementation. Calibre handles signoff verification, while Tessent supports design-for-test workflows.

    The broader setup also covers Innovator3D IC for advanced 3D chip integration and Xpedition for PCB design. Rather than asking one large AI model to understand every part of the process, Siemens uses domain-specific agents that collaborate across individual engineering stages. One agent can concentrate on verification while another works on implementation or layout analysis. Fuse manages the handoffs and checks whether the combined result remains technically valid.

    Solido Gets Agentic AI for Custom IC Design

    The Siemens-NVIDIA collaboration also expands AI capabilities inside the Solido Characterization Suite. Library characterisation is a slow but essential part of semiconductor development. Engineers must analyse how circuit elements behave across different voltages, temperatures and manufacturing conditions. The resulting Liberty files help other design tools understand timing, power consumption and functional behaviour.

    Siemens says its new agentic workflows can automatically generate and verify those files using Solido Characterizer, LibSPICE, Generator and Analytics. According to the company, the system can reduce characterisation turnaround time by more than tenfold while cutting token-related costs by between five and ten times. Those figures come from Siemens and may vary across customer environments.

    The company is also introducing Solido Layout Analyzer, an AI-powered tool for examining parasitic and layout-dependent effects after a circuit has been physically arranged. Engineers can use natural-language prompts to explore results, identify possible fixes and create reports. The practical benefit is not the conversational interface itself. It is the possibility of finding layout problems earlier, before they turn into lengthy debugging sessions.

    STMicroelectronics plans to test the technology in its non-volatile memory design work. The chipmaker said earlier visibility into the relationship between layout and electrical behaviour could potentially reduce debugging time by weeks.

    Verification Is Where Self-Checking AI Could Matter Most

    Semiconductor verification can consume up to 70% of the design process, according to Siemens. Modern chips contain enormous numbers of components, while chiplets and 3D IC architectures introduce more connections and interactions to test. Engineers are not simply checking whether a design functions once. They must examine how it behaves across countless conditions and edge cases.

    Siemens is extending its Questa One Agentic Toolkit with NVIDIA’s Nemotron 3 Ultra reasoning model for these long-running verification workloads. The agents can evaluate design trade-offs and compare results against a trusted test harness. When a proposed change fails, the agent can inspect the failure, adjust its plan and run another test.

    That does not remove engineers from the process. Human teams still define requirements, governance rules and approval points. The AI takes on more of the repetitive orchestration, investigation and rerunning of tools. This is less glamorous than asking an AI to invent a new chip from scratch. It may also be far more useful.

    Intelligence Center X Connects Chip Design With the Wider Business

    Fuse EDA AI Agent is also being integrated into Siemens Intelligence Center X. The platform supports the creation and coordination of industrial AI agents across design, manufacturing and supply-chain operations. That could eventually allow information discovered during chip design to influence later production planning or component sourcing.

    A design agent, for example, might identify a manufacturing constraint. Intelligence Center X could pass that information into a wider enterprise workflow rather than leaving it trapped inside the EDA environment. Siemens describes this as an extension of its digital twin strategy. The design model does not stop at the engineering department. It becomes part of a broader reasoning system spanning the product and production lifecycle.

    Trust Has Become the Real Test for Industrial AI Agents

    Agentic AI demonstrations often focus on autonomy. The agent receives a goal, chooses tools and completes a chain of tasks. Industrial engineering needs a stricter standard. An agent must explain what it changed, show which tools it used and prove that the result meets established physical and technical rules. Without those checks, faster automation can simply produce errors at a higher speed.

    Siemens and NVIDIA are trying to answer that problem with agents that repeatedly verify their work rather than generating a result and moving on. The approach does not eliminate risk. Self-verification remains dependent on the quality of the underlying tools, test environments, data and engineering rules. An agent may still optimise for the wrong target when teams define the objective poorly.

    Yet this is a more grounded direction for industrial AI. The value comes not from letting software act without supervision, but from allowing it to work for longer periods while remaining connected to trusted engineering systems. Siemens said the expanded AI-driven EDA capabilities will arrive through forthcoming releases of its AI-native EDA portfolio. The company has not announced one general availability date for every feature.

    Sources

    • Siemens Press Release: Siemens advances self-verifying agentic AI workflows for semiconductor and PCB design
    • PR Newswire: Siemens advances self-verifying agentic AI workflows for semiconductor and PCB design
    • Siemens Fuse EDA AI System
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